Design of charging station and optimization of oscillation circuits for new energy vehicles

2.1. Design of overall structure and function

Single phase active PFC technology is mainly divided into single stage and two-stage. Single stage active PFC is only suitable for low-power applications. In addition, due to the presence of a large number of low-frequency ripple in the output current, this single-stage PFC is only used for lead-acid batteries. Electrical isolation is also a major safety requirement for protecting electric vehicle users in on-board chargers, so two-stage on-board chargers are currently the mainstream solution. The two-stage on-board charger often has an active PFC circuit in the front stage and an isolated DC/DC circuit in the back stage. The overall structure of the designed charging station is shown in Fig. 1. The front stage PFC circuit rectifies AC into a high-voltage DC bus and achieves power factor correction. The later isolated DC/DC converts the high-voltage DC bus into the required charging voltage to charge the lithium battery pack, further regulating the voltage pulsation of the high-voltage bus to prevent low-frequency pulsation in the bus voltage from being transmitted to the battery side.

Fig. 1Overall design of charging station

2.2. Design of control chip

The designed chip is a typical linear charging management chip, as shown in Fig. 2.

Fig. 2Wiring diagram of control chip

This chip provides integrated success rate field-effect transistors, high-precision constant voltage sources, temperature monitoring, charging status display, and battery charging completion termination functions. When the chip charges the battery, the charging current is limited, rather than operating under constant current charging. The pre charging stage with time constraints is used to pre charge deeply discharged batteries. Once the battery voltage reaches the charging voltage, the high-precision constant voltage charging stage will start and complete the entire charging process. The chip terminates charging by minimizing the current. In addition, the chip also includes a low-power sleep mode, which means that when the power supply voltage VCC is lower than the battery voltage, the chip enters sleep mode. When the battery voltage is lower than VRCH, the recharging process will be initiated.

2.3. Control of excitation response

In order to obtain the open-circuit voltage curve, the battery is charged and discharged at a constant current of 8 A, continuously recording the ampere hours of the battery and the corresponding battery voltage. The measured voltage data is transmitted to the upper computer through CAN communication using BMS. The variation curve of the excitation current during the charging process is shown in Fig. 3. It can be seen that as the charging progresses, the battery voltage gradually increases and the switching frequency gradually decreases, resulting in a significant increase in the excitation current. Excessive excitation current will increase the conduction and turn off losses of the switch tube. So it is necessary to consider the optimization design of excitation current. The process of constant current and constant voltage charging is mainly divided into two stages. Firstly, the battery is charged with a constant current until it is charged to 70 % to 90 % of the stage. After the battery voltage reaches the preset value, the constant current mode switches to the constant voltage mode. Then charge the battery with a constant voltage, and the charging current gradually decreases. Even if the constant voltage mode is only used for the small remaining capacity of the charging pool, this stage still needs to take up a certain amount of time, because the constant voltage charging stage of the battery is a process where the charging current gradually decreases to zero.

Fig. 3The variation curve of excitation current and switching frequency during the charging process

3.1. Optimization of clock reference oscillation circuit

The main problem to be overcome at present is the impact of changes in power supply voltage on the accuracy and amplitude of the oscillator. The main reason why RC oscillators are not stable and have low accuracy is that their level flipping is closely related to the jump in power supply voltage. If two signals are used for error comparison, as both signals are affected by changes in power supply voltage, the influence of power supply voltage can be eliminated or partially eliminated during error comparison, thereby stabilizing the waveform of the oscillator. Another reason for the low accuracy of traditional RC oscillators is that their period mainly depends on the product of RC. In order to improve accuracy, the period of the oscillator can be mainly determined by the delay time of the error comparator, and the charging and discharging time of RC is determined by the charging and discharging current. If the charging and discharging current can be controlled, a relatively high accuracy oscillator circuit can be obtained. According to the optimized design, the circuit architecture diagram of the oscillation module generated by the clock reference can be obtained as shown in Fig. 4. The circuit undergoes two processes of capacitor charging and discharging to achieve oscillation. VHIGH and VLOWN are at “1” and “0” levels. When the S-terminal is high or low, the high and low levels are alternately selected for output, becoming the output of the oscillator.

Fig. 4Design of clock reference oscillation circuit

3.2. Optimization of stable voltage power supply circuit

According to the overall requirements of chip design, the regulated power module must generate a series of reference voltages that are minimally affected by the power supply voltage, temperature, and process angle. Since the highest required reference voltage is 4.2 V, while the output voltage of a typical bandgap reference generation circuit is 1.25 V or 2.5 V, a low voltage differential linear regulator needs to be designed to obtain the required reference level. Although the co emission amplifier circuit has Miller effect, its speed can be improved by setting a lower gain for it. The second stage amplification circuit is the main amplification stage of the operational amplifier, which is achieved by setting a larger resistance value. Due to the absence of Miller effect in the common base amplifier circuit, it can achieve high gain while also considering high speed. So the operational amplifier has a high speed, which will greatly shorten the response time of the reference voltage under various interferences. The optimized and simplified regulated power supply circuit is shown in Fig. 5. Due to the two-stage operational amplifier, capacitors are used as Miller compensation to ensure loop stability. Constant current charging is a charging strategy that maintains a constant current flowing into the battery by changing the charging voltage. When the charging voltage reaches a preset value, charging stops. On the contrary, during constant voltage charging, the charging voltage is kept constant and the charging current is changed until the charging current decreases to near zero. Constant power charging refers to maintaining a constant power during charging, as the battery can be seen as a voltage source. Therefore, this method is somewhat similar to constant voltage charging, except that the charging current does not change relatively much. Reduced current charging is achieved through an uncontrolled voltage source, and as the battery voltage increases, the charging current decreases in an uncontrolled manner. Due to the fact that reduced current charging is not regulated, it can easily lead to overcharging and cause harm to the battery.

In order to verify the effectiveness of the proposed electronic control design, a hardware platform for the test of DC output characteristics was built in the laboratory, as shown in Fig. 6. The charging module consists of 20 lithium batteries, with a single rated voltage of 3.6 V and a rated capacity of 200 Ah. The resonant inductance of the charger consists of two parts, one of which is an independent inductance wound on the magnetic core 25 μH. The other part is the leakage inductance of the transformer 12 μH. The total resonant inductance is 37 μH. The adjustment range of switch frequency is from 80 kHz to 120 kHz. The digital control chip used is STM32F103R8T6.

Fig. 5Optimized and simplified regulated power supply circuit

Fig. 6Hardware platform for the test of DC output characteristics

a) Hardware architecture

b) Composition of the controller

Under the conditions of input AC voltage of 185 V and 220 V, the DC output voltage waveform was tested, as shown in Fig. 7. $I_{in}$ and $V_{in}$ represent the input AC voltage and current, respectively, $V_{dc}$ is the DC output voltage. It can be seen that the voltage under different sampling numbers has good stability, and the output deviation is very low, which can effectively meet the requirements. Under different input conditions, the stability of the DC output voltage is good and there is no oscillation problem. When the battery voltage reaches constant voltage VOREG, it will enter a constant voltage charging state. Within the entire operating temperature and voltage range, the constant voltage accuracy is higher than 0.5 %, and the chip monitors the battery voltage through BAT and VSS pins. For safety reasons, a safety timer is also designed during the constant voltage charging phase. During the charging process, if the timer counts but the battery is not fully charged, the chip turns off power FET, stops charging, and indicates an error on the STAT pin. The error mode is eliminated by repowering on the power or reinserting the battery.

Fig. 7Output voltage waveform

a) Input AC voltage 185 V

b) Input AC voltage 220 V